Bio:

Jean-Frédéric Christmann received the M.S and PhD degrees in Electronics from the Grenoble Institute of Technology in France in 2009 and 2013. Since 2009, he is a research engineer at the French Atomic Energy Commission (CEA). He first was with the Digital Circuits and Systems Department where he worked on mixed-signals systems modelling, multicore processor assembly and functional validation, low power microcontrollers architectures, asynchronous processors logical synthesis and physical implementation, and In-Memory Computing controllers. From 2018 to 2022, he has been the digital technical leader for a world-class mixed-signals pressure sensor design. Since 2022, he is with the Silicon Component Department where he works on standard cells design automation and advanced technologies benchmarking.

Abstract:

To evaluate the performance of the 10nm FD-SOI CMOS technology process, FAMES offers a pathfinding design platform targeting both analog and digital design. Offering multiple devices, the compehensive PDK featuring DRC, LVS, PEX and Virtuoso support allows exploration of advanced process features. Moreover, 50+ combinational and sequential cells are derived in 16 standard cells libraries with Verilog, Spice, Liberty, and LEF descriptions, which enables the implementation of complex digital architectures and hence system-level benchmarking.